The present invention relates to a voltage conversion circuit. More particularly, it relates to a voltage conversion circuit that generates an internal supply voltage by stepping up or stepping down an external supply voltage.
Particularly, a supply voltage generating circuit (generator), which is provided in a semiconductor memory device such as DRAM, generates an internal supply voltage, such as a stepped-up voltage supplied to word lines and a negative voltage supplied to the substrate, using an external supply voltage. When the external supply voltage becomes lower due to reduction in consumed power, the internal supply voltage also becomes lower. This requires a supply voltage generator with a sufficient current supplying capability and low power consumption even when an external supply voltage is relatively low.
FIG. 1A is a schematic circuit diagram of a conventional stepped-up voltage generator 100. A supply voltage Vcc is supplied to the anode of a diode D1 from an external apparatus. The cathode of the diode D1 is connected to the anode of a diode D2. The cathode of the diode D2 is connected to the anode of a diode D3, and a stepped-up voltage Vpp is output from the cathode of the diode D3. A switch circuit SW1 is connected in parallel to the diode D3.
A first input signal IN1 is supplied to a node N1 disposed between the diodes D1 and D2 via a capacitor C1. A second input signal IN2 is supplied to a node N2 disposed between the diodes D2 and D3 via a capacitor C2.
The stepped-up voltage generator 100 can selectively perform a one-stage step-up operation or two-stage step-up operation. In the one-stage step-up operation mode, when the switch circuit SW1 is conducting, the clock input signal IN1 having a predetermined frequency and the clock input signal IN2 having a fixed level are supplied as shown in FIGS. 1B and 1C. The pumping operation by the diode D1 and the capacitor C1 steps up the voltage at the node N1 to higher than the level of the supply voltage Vcc, so that the stepped-up voltage Vpp is supplied to a load circuit via the diode D2 and the switch circuit SW1. In the one-stage step-up operation, the stepped-up voltage Vpp is ideally twice the supply voltage Vcc.
In the two-stage step-up operation mode, as shown in FIG. 2A, the clock input signals IN1 and IN2 have different phases and predetermined frequencies as shown in FIGS. 2B and 2C, and are supplied when the switch circuit SW1 is nonconducting. The pumping operation by the diode D1 and the capacitor C1 and the pumping operation by the diode D2 and the capacitor C2 are alternately performed to step up the voltage at the node N2 higher than the level of the supply voltage Vcc, so that the stepped-up voltage Vpp is supplied to the load circuit via the diode D3. In the two-stage step-up operation, the stepped-up voltage Vpp is ideally three times the supply voltage Vcc.
FIG. 3 is a graph showing the relationship between the output voltage and the maximum supply current in the stepped-up voltage generator. The horizontal axis shows the stepped up voltage Vpp in terms of a magnification with respect to the supply voltage Vcc. The vertical axis represents the allowable supply current.
With the same output voltage Vpp, the allowable supply current I2 in the two-stage step-up operation mode is larger than the allowable supply current I1 in the one-stage step-up operation mode. This is because the capacitor C1 alone contributes to the pumping operation in the one-stage step-up operation mode whereas the capacitors C1 and C2 contribute to the pumping operation in the two-stage step-up operation mode. However, the two-stage step-up operation has a lower power efficiency than the one-stage step-up operation and thus suffers greater power consumption. As shown in FIG. 3, Ip indicates the consumed current of the load circuit to which the stepped-up voltage Vpp is supplied. The consumed current Ip increases in proportion to the voltage of the stepped-up voltage Vpp.
To reduce the power consumption of the stepped-up voltage generator while keeping a sufficient supply current to the load circuit, it is desirable that the one-stage step-up operation and the two-stage step-up operation should be switched at a voltage Va (set switch voltage) at which the consumed current Ip intersects the allowable supply current I1 of. the one-stage step-up operation mode. That is, the one-stage step-up operation is performed when Vpp less than Va, and the two-stage step-up operation is performed when Va less than Vpp.
In a memory device, such as DRAM, the supply voltage Vpp is supplied to a selected word line and is higher than the supply voltage Vcc by the threshold value of cell transistors or larger. The difference between the supply voltage Vpp and the supply voltage Vcc therefore becomes substantially constant regardless of the level of the supply voltage Vcc. The higher the supply voltage Vcc becomes, the smaller the ratio of the supply voltage Vpp to the supply voltage Vcc becomes.
The consumed current Ip is substantially proportional to the supply voltage Vpp, and the absolute amount of the allowable supply currents I1 and I2 increase as the supply voltage Vcc rises. Therefore, as the supply voltage Vcc becomes higher, the consumed current Ip is relatively shifted to the lower portion of the graph of FIG. 3.
When the supply voltage Vcc is relatively high, therefore, the set switch voltage Va moves to a high-voltage side. This widens the range of the supply voltage Vpp that can supply the allowable supply current I1 greater than the consumed current Ip in the one-stage step-up operation, thus improving the power efficiency of the stepped-up voltage generator 100.
When the supply voltage Vcc is relatively low, the set switch voltage moves to a low-voltage side. This narrows the range of the supply voltage Vpp that can supply the allowable supply current I1 greater than the consumed current Ip in the one-stage step-up operation, thus lowering the power efficiency of the stepped-up voltage generator 100.
The set switch voltage Va is set based on the supply voltage Vcc. It is however difficult to accurately detect the set switch voltage Va based on the supply voltage Vcc. If the one-stage step-up operation is changed to the two-stage step-up operation when the supply voltage Vpp higher than the set switch voltage Va is output, the allowable supply current I1 falls to or below the consumed current Ip. This causes the supply voltage Vpp to fall.
One way to prevent the allowable supply current I1 from becoming lower than the consumed current Ip is to change the one-stage step-up operation to the two-stage step-up operation when the supply voltage Vpp sufficiently lower than the set switch voltage Va is output. In this case, however, the two-stage step-up operation is performed in the voltage range that is sufficient for the one-stage step-up operation. This lowers the power efficiency of the stepped-up voltage generator and thus increases the consumed power of the entire device.
Accordingly, it is an object of the present invention to provide a voltage conversion circuit which has an improved power efficiency and lower power consumption.
In a first aspect of the present invention, a voltage conversion circuit is provided. The voltage conversion circuit includes a plurality of voltage conversion cells each including a capacitor element. A switch circuit is connected to the plurality of voltage conversion cells to selectively switch between parallel connections of a plurality of voltage conversion cells and serial connections of a plurality of voltage conversion cells. A control circuit is connected to the switch circuit to control the switch circuit to selectively perform first voltage conversion of an input voltage by the plurality of parallel-connected voltage conversion cells and second voltage conversion of the input voltage by the plurality of series-connected voltage conversion cells.
In a second aspect of the present invention, a voltage conversion circuit is provided. The voltage conversion circuit includes a plurality of voltage conversion cells, each of which includes a capacitor element. A plurality of switch circuits are connected between an input voltage and an output terminal of the voltage conversion circuit. The plurality of voltage conversion cells are respectively connected to a plurality of nodes between adjoining switch circuits. One or more cell-connection switch circuits are connected between one or more of the plurality of nodes and the output terminal of the voltage conversion circuit. A control circuit is connected to the plurality of switch circuits and the one or more cell-connection switch circuits to control the plurality of switch circuits and the one or more cell-connection switch circuits to selectively perform first voltage conversion of an input voltage by the plurality of parallel-connected voltage conversion cells and second voltage conversion of the input voltage by the plurality of series-connected voltage conversion cells.
In a third aspect of the present invention, a voltage conversion circuit is provided. The voltage conversion circuit includes a plurality of voltage conversion cells, each of which includes a capacitor element. A plurality of switch circuits are connected between an input voltage and an output terminal of the voltage conversion circuit. The plurality of voltage conversion cells are respectively connected to a plurality of nodes between adjoining switch circuits. One or more cell-connection switch circuits are connected to one or more pairs of nodes in parallel to the plurality of switch circuits. A control circuit is connected to the plurality of switch circuits and the one or more cell-connection switch circuits to control the plurality of switch circuits and the one or more cell-connection switch circuits to selectively perform first voltage conversion of an input voltage by the plurality of parallel-connected voltage conversion cells and second voltage conversion of the input voltage by the plurality of series-connected voltage conversion cells.
In a fourth aspect of the present invention, a control circuit for a voltage conversion circuit is provided. The voltage conversion circuit includes a plurality of voltage conversion cells, each of which includes a capacitor element, and a switch circuit, connected to the plurality of voltage conversion cells, for selectively switching between parallel connection of a plurality of voltage conversion cells and serial connection of a plurality of voltage conversion cells. The control circuit is connected to the switch circuit to control the switch circuit to selectively perform first voltage conversion of an input voltage by the plurality of parallel-connected voltage conversion cells and second voltage conversion of the input voltage by the plurality of series-connected voltage conversion cells.
Other aspects and advantages of the invention will become apparent from the following description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.